1. Field of the Invention
This invention relates to differential amplifiers and to high frequency resonators constructed from such differential amplifiers, and more particularly to a CMOS microwave multiphase voltage controlled oscillator.
2. Background Art
With the advent of the information era and the current interest in broadband data connections to the home, low cost, low power data receivers are required to interface with wideband data transport media. Such data receivers are required to regenerate digital data at multi-gigahertz frequencies. These requirements press current integrated circuit technology capability to the limits, and problems of low power, integrated clock recovery mechanisms exist.
One technique which is used to maximize the rate at which data can be recovered in a given silicon technology is to use a 1:2 demultiplex circuit at the chip data input (J. Hauenschild et al., "A 22 Gb/s Decision Circuit and A 32 Gb/s Regenerating Demultiplexer IC Fabricated in Silicon Bipolar Technology", IEEE 1992 Bipolar Circuits and Technology Meeting, Paper 7.4). This can be accomplished, for example, by regenerating the data with two D-type flip-flops whose data inputs are connected to the incoming data, but whose clock inputs are clocked on the rising and falling edges of the clock, respectively. Thus, for example, a 2 Gb/s data stream could be regenerated by a 1 GHz clock.
In U.S. Pat. Nos. 5,185,581 (A. K. D. Brown, February 1993); 5,172,076 (A. K. D Brown, December 1992); and 5,371,475 (A. K. D. Brown, December 1994), all assigned to Northern Telecom Limited, a family of VCOs has been described which employs gyrator circuits using transconductors with built in delay. The primary application of these circuits is in silicon bipolar and bipolar HBT technology. The comparatively large transconductance of the bipolar transistors of the VCOs disclosed in the above patents permits oscillation of sufficiently high frequencies, and the built in delay of these transconductors is sufficient to maintain reliable oscillation.
U.S. Pat. No. 5,185,581 discloses a type of VCO which has quadrature phase outputs. By clocking four D-type flip-flops of the four phases of such a VCO and connecting the data inputs to a common data stream, a 1:4 demultiplex circuit is obtained. Such an arrangement would regenerate a 4 Gb/s data stream from a 1 GHz VCO.
In MOS technology, however, the transconductance is generally an order of magnitude less than in bipolar technology, so that the built in delay of the transistors is treated as a parasitic component (Krummenacher, "Design Considerations in High-Frequency CMOS Transconductance Amplifier Capacitor (TAC) Filters", 1989 IEEE International Symposium on Circuits and Systems) and is not sufficient to permit oscillation. The Krummenacher article describes CMOS harmonic oscillators which employ negative resistance transconductors to compensate for the gyrator loss admittance to provide an oscillator.
The present invention provides a novel MOS gyrator VCO architecture that does not require the transistors to have significant built in delay. In addition, the present invention uses a special four transconductor gyrator structure rather than the usual two. Further, the gyrator capacitors are connected as shunt Miller feedback capacitors over .pi./4 radians phase shift.